BRAINSTORMING
Making logic with wires which are one-directional, whether 'logic levels' or photons, is easy. However real-world logic often uses wires which can be fed and tapped at multiple places. This can only be emulated by making wires bidirectional.
Example from electronics:
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(ASCII art! because images are boring)
HIGH HIGH
| |
| |
+-----------------+
| |
,|. ,|.
| | | |
| | <- resistor-> | |
| | | |
,|. ,|.
| |
LOW LOWFor a recap on transistor theory (in this case N-type):
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(any) HI or UN pulled LO by transistor
| | |
| | |
. .--' . .--' . .--'
| | | | | |
LO or UN ----+ | off HI ----+ | off HI ----+ | on
| | | | | |
' `--. ' `--. ' `--.
| | |
| | |
(any) HI or UN LOTo emulate this kind of wire, it needs two lanes going in either direction, and which can be powered (or not) from either end.
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The Wire.
After a few failed attempts, I decided a wire needs to be able to send all of 'high', 'low' and 'unpowered' on either lane. I settled on phase-keying with 10-micron technology (more on this later). Depending on whether photons are in the even or odd positions determines 'low' or 'high', and no photons means 'unpowered'.
(Set step size to x10 and use single-stepping)
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x = 143, y = 105, rule = WireWorld
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Junctions and transistors will need a of crossings. The simplest WireWorld crossing only acts as correctly as a crossing when only one input at a time receives a photon. If both inputs receive a photon at roughly the same time, they interfere with each other and this ruined my day.
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x = 46, y = 9, rule = WireWorld
.3CA$C4.B3C$.4C4.C.C$8.38C$8.C2.C$8.38C$.4C4.C.C$B4.4C$.A3C!I tested the double-and-not-crossing gate and concluded that the inputs must be at least 5 gens apart. Thus I chose 10-micron technology to be able to cross two lanes with photons in spaces 10 gens apart.
Later I found out that 10-micron comes in very handy to work reliably with phase-keying. The photons are now aligned to the 10/10 grid. This means that I can tell if a lane is 'high' or 'low' just by looking at if the numerical coordinate of the photon head. I define here, if photons are in positions multiple of 20 the lane is 'low'. If it's a multiple of 20, plus 10 (like 70), it means 'high'. (Note: I have no control over coordinates in this forum's 'viewer'.)
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The Junction connects four 2-lane wires from all orthogonal directions. The input lane of each wire must go to the output lane of the other three wires. After lots of playing and tuning this is what I've got.
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x = 83, y = 83, rule = WireWorld
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This is an 'N'-type transistor, meaning it conducts when the control input is at a higher potential than one of the side ports. Thus, one of the sides needs to receive a LO and the control must be HI, before the transistor will turn 'on' and act as a wire. Otherwise it will act as a disconnection.
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x = 149, y = 103, rule = WireWorld
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Open questions / TODO:
- Wire with indicators to make it easier to see the state (partially done).
- I tried optimizing the crossing without success, but I'm sure it can be optimized still. In one incarnation (before phase-keying was implemented) I could optimize one OR gate into a crossing by taking away an ear (same as in 2D ROMs). I couldn't find a way to do that it in this version.
- Wire bends.
- Is this type of wire sufficient? In case a wire is connected to both HI and LO, and a branch of this wire acts as an output, what state is it? It's in fact both HI and LO simultaneously because both timeslots (even/odd) get photons. In this idea I designate it as a 'short circuit', a situation to avoid. If this turns out to be problematic, I need to redesign the lanes with 5 states, ('hard high', 'soft high', 'unpowered', 'soft low', 'hard low').
- Is it necessary to emulate resistors, for example in NMOS? There, a transistor pulls a line to LO which is otherwise held HI with a resistor. If done here, it creates a short-circuit. A work-around is to make an in-line converter that translates {LO->LO, UN->HI, HI->HI}.
- What about static charge? It's needed for DRAM logic which is made by disconnecting (with a transistor) a HI wire going to the control input of another transistor, so it stays on by static electricity confined in the wire. One way may be to loop back the control input wire as the 'output' of the control port, and also have both side ports 'loop back' when the transistor is off?
